how to make simple makefile for c program

There's no shortage of tutorials on writing Makefiles by writing your own rules, but fail to tell that Make already knows most of the rules you're going to feed to it. This is the way (I think) Makefiles should be written from ground up. Notice how that doesn't include a single explicitly written rule for building anything. include $(DEPS) # this makes magic happen Here's a more thorough (but untested) example: CFLAGS=-std=c99ĬFLAGS+=-MMD # dependency generation magic header files), just add -MMD to your CFLAGS (assuming gcc or clang) and add an -include clause to your Makefile to include the dependency files.

When you need automatic dependency resolution (ie. Read the Make manual (seriously!) to find the built-in rules and how they work. Don't invent your own names for this, they won't work with the built-in rules. For linker flags you add LDFLAGS and LDLIBS. That's it! A single line! Nothing else is required.įor compiler arguments, you add CFLAGS. To compile and link a program consisting of a single C file (test.c), this is what your initial Makefile should look like: test: test.o

People see these clunky ad-hoc Makefile tutorials and think that make is a bad tool. Make is all about using the implicit rules to build object files and using the dependency resolution rules that make things click. Sorry to put this bluntly but: oh no, yet another Makefile tutorial that teaches the wrong way to do it.

How to make simple makefile for c program